diff -urwpN u-boot.orig/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts u-boot.new/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts --- u-boot.orig/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts 2017-11-11 16:23:45.100758097 +0100 @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-h5.dtsi" + +#include + + +/ { + model = "OrangePi Zero Plus"; + compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + compatible = "allwinner,sun50i-h5-mmc", + "allwinner,sun50i-a64-mmc", + "allwinner,sun5i-a13-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; diff -urwpN u-boot.orig/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts u-boot.new/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts --- u-boot.orig/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts 2017-11-11 16:21:54.983769300 +0100 @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + + +/ { + model = "OrangePi Zero Plus2 H3"; + compatible = "xunlong,orangepi-zero-plus2-h3", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; diff -urwpN u-boot.orig/arch/arm/lib/spl.c u-boot.new/arch/arm/lib/spl.c --- u-boot.orig/arch/arm/lib/spl.c 2017-11-11 14:28:02.706825270 +0100 +++ u-boot.new/arch/arm/lib/spl.c 2017-11-11 15:36:17.012466776 +0100 @@ -74,3 +74,17 @@ void __noreturn jump_to_image_linux(stru } #endif /* CONFIG_ARM64 */ #endif + +u8 spl_genimg_get_arch_id(const char *arch_str) +{ + if (!arch_str) + return IH_ARCH_DEFAULT; + + if (!strcmp(arch_str, "arm")) + return IH_ARCH_ARM; + + if (!strcmp(arch_str, "arm64")) + return IH_ARCH_ARM64; + + return IH_ARCH_DEFAULT; +} diff -urwpN u-boot.orig/arch/arm/mach-sunxi/Kconfig u-boot.new/arch/arm/mach-sunxi/Kconfig --- u-boot.orig/arch/arm/mach-sunxi/Kconfig 2017-11-11 14:28:02.822779934 +0100 +++ u-boot.new/arch/arm/mach-sunxi/Kconfig 2017-11-11 15:36:17.048452712 +0100 @@ -63,6 +63,25 @@ config MACH_SUNXI_H3_H5 select SUNXI_GEN_SUN6I select SUPPORT_SPL +config MACH_SUN50I + bool + select DM_I2C + select SUNXI_DE2 + select SUNXI_GEN_SUN6I + select SUNXI_HIGH_SRAM + select SUPPORT_SPL + select SUNXI_DRAM_DW + select SUNXI_DRAM_DW_32BIT + select FIT + select SPL_LOAD_FIT + +config MACH_SUN50I_H5 + bool + select MACH_SUNXI_H3_H5 + select SUNXI_HIGH_SRAM + select FIT + select SPL_LOAD_FIT + choice prompt "Sunxi SoC Variant" optional @@ -167,26 +186,25 @@ config MACH_SUN9I select SUNXI_GEN_SUN6I select SUPPORT_SPL -config MACH_SUN50I +config MACH_SUN50I_64 bool "sun50i (Allwinner A64)" select ARM64 - select DM_I2C - select SUNXI_DE2 - select SUNXI_GEN_SUN6I - select SUNXI_HIGH_SRAM - select SUPPORT_SPL - select SUNXI_DRAM_DW - select SUNXI_DRAM_DW_32BIT - select FIT - select SPL_LOAD_FIT + select MACH_SUN50I -config MACH_SUN50I_H5 +config MACH_SUN50I_32 + bool "sun50i (Allwinner A64) SPL-32bit" + select CPU_V7 + select MACH_SUN50I + +config MACH_SUN50I_H5_64 bool "sun50i (Allwinner H5)" select ARM64 - select MACH_SUNXI_H3_H5 - select SUNXI_HIGH_SRAM - select FIT - select SPL_LOAD_FIT + select MACH_SUN50I_H5 + +config MACH_SUN50I_H5_32 + bool "sun50i (Allwinner H5) SPL-32bit" + select CPU_V7 + select MACH_SUN50I_H5 endchoice diff -urwpN u-boot.orig/arch/arm/mach-sunxi/Makefile u-boot.new/arch/arm/mach-sunxi/Makefile --- u-boot.orig/arch/arm/mach-sunxi/Makefile 2017-11-11 14:28:02.822779934 +0100 +++ u-boot.new/arch/arm/mach-sunxi/Makefile 2017-11-11 15:36:17.050451931 +0100 @@ -51,4 +51,5 @@ obj-$(CONFIG_MACH_SUN8I_A83T) += dram_su obj-$(CONFIG_SUNXI_DRAM_DW) += dram_sunxi_dw.o obj-$(CONFIG_SUNXI_DRAM_DW) += dram_timings/ obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o +obj-$(CONFIG_MACH_SUN50I) += spl_switch.o endif diff -urwpN u-boot.orig/arch/arm/mach-sunxi/spl_switch.c u-boot.new/arch/arm/mach-sunxi/spl_switch.c --- u-boot.orig/arch/arm/mach-sunxi/spl_switch.c 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/arch/arm/mach-sunxi/spl_switch.c 2017-11-11 15:36:17.051451540 +0100 @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2016 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include +#include + +static void __noreturn jump_to_image_native(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_noargs_t)(void); + + image_entry_noargs_t image_entry = + (image_entry_noargs_t)spl_image->entry_point; + + image_entry(); +} + +static void __noreturn reset_rmr_switch(void) +{ +#ifdef CONFIG_ARM64 + __asm__ volatile ( "mrs x0, RMR_EL3\n\t" + "bic x0, x0, #1\n\t" /* Clear enter-in-64 bit */ + "orr x0, x0, #2\n\t" /* set reset request bit */ + "msr RMR_EL3, x0\n\t" + "isb sy\n\t" + "nop\n\t" + "wfi\n\t" + "b .\n" + ::: "x0"); +#else + __asm__ volatile ( "mrc 15, 0, r0, cr12, cr0, 2\n\t" + "orr r0, r0, #3\n\t" /* request reset in 64 bit */ + "mcr 15, 0, r0, cr12, cr0, 2\n\t" + "isb\n\t" + "nop\n\t" + "wfi\n\t" + "b .\n" + ::: "r0"); +#endif + while (1); /* to avoid a compiler warning about __noreturn */ +} + +void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + if (spl_image->arch == IH_ARCH_DEFAULT) { + debug("entering by branch\n"); + jump_to_image_native(spl_image); + } else { + debug("entering by RMR switch\n"); + writel(spl_image->entry_point, 0x17000a0); + DSB; + ISB; + reset_rmr_switch(); + } +} diff -urwpN u-boot.orig/common/spl/Kconfig u-boot.new/common/spl/Kconfig --- u-boot.orig/common/spl/Kconfig 2017-11-11 14:28:05.292814204 +0100 +++ u-boot.new/common/spl/Kconfig 2017-11-11 16:39:12.925331810 +0100 @@ -696,7 +696,7 @@ config SPL_YMODEM_SUPPORT config SPL_ATF_SUPPORT bool "Support ARM Trusted Firmware" - depends on ARM64 + depends on MACH_SUN50I || MACH_SUN50I_H5 help ATF(ARM Trusted Firmware) is a component for ARM arch64 which is loaded by SPL(which is considered as BL2 in ATF terminology). diff -urwpN u-boot.orig/common/spl/spl.c u-boot.new/common/spl/spl.c --- u-boot.orig/common/spl/spl.c 2017-11-11 14:28:05.293813813 +0100 +++ u-boot.new/common/spl/spl.c 2017-11-11 15:36:17.075442165 +0100 @@ -152,6 +152,7 @@ int spl_parse_image_header(struct spl_im header_size; } spl_image->os = image_get_os(header); + spl_image->arch = image_get_arch(header); spl_image->name = image_get_name(header); debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n", (int)sizeof(spl_image->name), spl_image->name, diff -urwpN u-boot.orig/common/spl/spl_atf.c u-boot.new/common/spl/spl_atf.c --- u-boot.orig/common/spl/spl_atf.c 2017-11-11 14:28:05.293813813 +0100 +++ u-boot.new/common/spl/spl_atf.c 2017-11-11 15:36:17.077441383 +0100 @@ -13,6 +13,7 @@ #include #include #include +#include static struct bl2_to_bl31_params_mem bl31_params_mem; static struct bl31_params *bl2_to_bl31_params; @@ -65,7 +66,9 @@ struct bl31_params *bl2_plat_get_bl31_pa ATF_EP_NON_SECURE); /* BL33 expects to receive the primary CPU MPID (through x0) */ +#ifdef CONFIG_ARM64 bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); +#endif bl33_ep_info->pc = CONFIG_SYS_TEXT_BASE; bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXECPTIONS); @@ -79,11 +82,14 @@ struct bl31_params *bl2_plat_get_bl31_pa void raw_write_daif(unsigned int daif) { +#ifdef CONFIG_ARM64 __asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory"); +#endif } void bl31_entry(void) { +#ifdef CONFIG_ARM64 struct bl31_params *bl31_params; void (*entry)(struct bl31_params *params, void *plat_params) = NULL; @@ -94,4 +100,18 @@ void bl31_entry(void) dcache_disable(); entry(bl31_params, NULL); +#else + debug("entering by ATF RMR switch\n"); + writel(CONFIG_SPL_ATF_TEXT_BASE, 0x17000a0); // RVBAR_EL3 register, entry point after RMR reset + DSB; + ISB; + __asm__ volatile ( "mrc 15, 0, r0, cr12, cr0, 2\n\t" + "orr r0, r0, #3\n\t" /* request reset in 64 bit */ + "mcr 15, 0, r0, cr12, cr0, 2\n\t" + "isb\n\t" + "nop\n\t" + "wfi\n\t" + "b .\n" + ::: "r0"); +#endif } diff -urwpN u-boot.orig/common/spl/spl_fit.c u-boot.new/common/spl/spl_fit.c --- u-boot.orig/common/spl/spl_fit.c 2017-11-11 14:28:05.294813422 +0100 +++ u-boot.new/common/spl/spl_fit.c 2017-11-11 15:36:17.086437867 +0100 @@ -111,6 +111,11 @@ static int get_aligned_image_size(struct return (data_size + info->bl_len - 1) / info->bl_len; } +__weak u8 spl_genimg_get_arch_id(const char *arch_str) +{ + return IH_ARCH_DEFAULT; +} + /** * spl_load_fit_image(): load the image described in a certain FIT node * @info: points to information about the device to load data from @@ -143,6 +148,7 @@ static int spl_load_fit_image(struct spl int align_len = ARCH_DMA_MINALIGN - 1; uint8_t image_comp = -1, type = -1; const void *data; + const char *arch_str; if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) { if (fit_image_get_comp(fit, node, &image_comp)) @@ -159,6 +165,9 @@ static int spl_load_fit_image(struct spl if (fit_image_get_load(fit, node, &load_addr)) load_addr = image_info->load_addr; + arch_str = fdt_getprop(fit, node, "arch", NULL); + image_info->arch = spl_genimg_get_arch_id(arch_str); + if (!fit_image_get_data_offset(fit, node, &offset)) { /* External data */ offset += base_offset; diff -urwpN u-boot.orig/configs/a64-olinuxino_defconfig u-boot.new/configs/a64-olinuxino_defconfig --- u-boot.orig/configs/a64-olinuxino_defconfig 2017-11-11 14:28:05.421763787 +0100 +++ u-boot.new/configs/a64-olinuxino_defconfig 2017-11-11 15:36:17.087437476 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -13,3 +13,8 @@ CONFIG_SPL=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/a64-olinuxino_spl32_defconfig u-boot.new/configs/a64-olinuxino_spl32_defconfig --- u-boot.orig/configs/a64-olinuxino_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/a64-olinuxino_spl32_defconfig 2017-11-11 15:36:17.088437086 +0100 @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/bananapi_m64_defconfig u-boot.new/configs/bananapi_m64_defconfig --- u-boot.orig/configs/bananapi_m64_defconfig 2017-11-11 14:28:05.436757925 +0100 +++ u-boot.new/configs/bananapi_m64_defconfig 2017-11-11 15:36:17.088437086 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 @@ -15,3 +15,8 @@ CONFIG_SPL=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/bananapi_m64_spl32_defconfig u-boot.new/configs/bananapi_m64_spl32_defconfig --- u-boot.orig/configs/bananapi_m64_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/bananapi_m64_spl32_defconfig 2017-11-11 15:36:17.089436695 +0100 @@ -0,0 +1,19 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/nanopi_a64_defconfig u-boot.new/configs/nanopi_a64_defconfig --- u-boot.orig/configs/nanopi_a64_defconfig 2017-11-11 14:28:05.587698910 +0100 +++ u-boot.new/configs/nanopi_a64_defconfig 2017-11-11 15:36:17.089436695 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -13,3 +13,8 @@ CONFIG_SPL=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/nanopi_a64_spl32_defconfig u-boot.new/configs/nanopi_a64_spl32_defconfig --- u-boot.orig/configs/nanopi_a64_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/nanopi_a64_spl32_defconfig 2017-11-11 15:36:17.090436305 +0100 @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/nanopi_neo2_defconfig u-boot.new/configs/nanopi_neo2_defconfig --- u-boot.orig/configs/nanopi_neo2_defconfig 2017-11-11 14:28:05.587698910 +0100 +++ u-boot.new/configs/nanopi_neo2_defconfig 2017-11-11 15:36:17.090436305 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I_H5=y +CONFIG_MACH_SUN50I_H5_64=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" @@ -14,3 +14,8 @@ CONFIG_SPL=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/nanopi_neo2_spl32_defconfig u-boot.new/configs/nanopi_neo2_spl32_defconfig --- u-boot.orig/configs/nanopi_neo2_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/nanopi_neo2_spl32_defconfig 2017-11-11 15:36:17.091435914 +0100 @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_32=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_pc2_defconfig u-boot.new/configs/orangepi_pc2_defconfig --- u-boot.orig/configs/orangepi_pc2_defconfig 2017-11-11 14:28:05.612689140 +0100 +++ u-boot.new/configs/orangepi_pc2_defconfig 2017-11-11 15:42:04.005869308 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I_H5=y +CONFIG_MACH_SUN50I_H5_64=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" @@ -16,3 +16,8 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_pc2_spl32_defconfig u-boot.new/configs/orangepi_pc2_spl32_defconfig --- u-boot.orig/configs/orangepi_pc2_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_pc2_spl32_defconfig 2017-11-11 15:36:17.092435523 +0100 @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_MACH_SUN50I_H5_32=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_MACPWR="PD6" +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_prime_defconfig u-boot.new/configs/orangepi_prime_defconfig --- u-boot.orig/configs/orangepi_prime_defconfig 2017-11-11 14:28:05.613688749 +0100 +++ u-boot.new/configs/orangepi_prime_defconfig 2017-11-11 15:42:37.707699885 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I_H5=y +CONFIG_MACH_SUN50I_H5_64=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" @@ -11,6 +11,12 @@ CONFIG_SPL=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_prime_spl32_defconfig u-boot.new/configs/orangepi_prime_spl32_defconfig --- u-boot.orig/configs/orangepi_prime_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_prime_spl32_defconfig 2017-11-11 15:42:47.418905105 +0100 @@ -0,0 +1,19 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_32=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_win_defconfig u-boot.new/configs/orangepi_win_defconfig --- u-boot.orig/configs/orangepi_win_defconfig 2017-11-11 14:28:05.613688749 +0100 +++ u-boot.new/configs/orangepi_win_defconfig 2017-11-11 15:36:17.093435133 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -14,3 +14,8 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_win_spl32_defconfig u-boot.new/configs/orangepi_win_spl32_defconfig --- u-boot.orig/configs/orangepi_win_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_win_spl32_defconfig 2017-11-11 15:36:17.094434742 +0100 @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_zero_plus2_defconfig u-boot.new/configs/orangepi_zero_plus2_defconfig --- u-boot.orig/configs/orangepi_zero_plus2_defconfig 2017-11-11 14:28:05.613688749 +0100 +++ u-boot.new/configs/orangepi_zero_plus2_defconfig 1970-01-01 01:00:00.000000000 +0100 @@ -1,18 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I_H5=y -CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881977 -CONFIG_MMC0_CD_PIN="PH13" -CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL=y -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_FPGA is not set -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_SPL_ISO_PARTITION is not set -# CONFIG_SPL_EFI_PARTITION is not set -CONFIG_SUN8I_EMAC=y -CONFIG_USB_EHCI_HCD=y -CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff -urwpN u-boot.orig/configs/orangepi_zero_plus2_h3_defconfig u-boot.new/configs/orangepi_zero_plus2_h3_defconfig --- u-boot.orig/configs/orangepi_zero_plus2_h3_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_zero_plus2_h3_defconfig 2017-11-11 16:17:42.225493214 +0100 @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff -urwpN u-boot.orig/configs/orangepi_zero_plus2_h5_defconfig u-boot.new/configs/orangepi_zero_plus2_h5_defconfig --- u-boot.orig/configs/orangepi_zero_plus2_h5_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_zero_plus2_h5_defconfig 2017-11-11 15:36:17.095434351 +0100 @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_64=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_zero_plus2_h5_spl32_defconfig u-boot.new/configs/orangepi_zero_plus2_h5_spl32_defconfig --- u-boot.orig/configs/orangepi_zero_plus2_h5_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_zero_plus2_h5_spl32_defconfig 2017-11-11 15:36:17.096433961 +0100 @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_32=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_zero_plus_defconfig u-boot.new/configs/orangepi_zero_plus_defconfig --- u-boot.orig/configs/orangepi_zero_plus_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_zero_plus_defconfig 2017-11-11 16:10:57.890428520 +0100 @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_64=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/orangepi_zero_plus_spl32_defconfig u-boot.new/configs/orangepi_zero_plus_spl32_defconfig --- u-boot.orig/configs/orangepi_zero_plus_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/orangepi_zero_plus_spl32_defconfig 2017-11-11 16:28:27.261544674 +0100 @@ -0,0 +1,19 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_32=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/pine64_plus_defconfig u-boot.new/configs/pine64_plus_defconfig --- u-boot.orig/configs/pine64_plus_defconfig 2017-11-11 14:28:05.639678587 +0100 +++ u-boot.new/configs/pine64_plus_defconfig 2017-11-11 15:36:17.096433961 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -14,3 +14,8 @@ CONFIG_OF_LIST="sun50i-a64-pine64 sun50i CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/pine64_plus_spl32_defconfig u-boot.new/configs/pine64_plus_spl32_defconfig --- u-boot.orig/configs/pine64_plus_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/pine64_plus_spl32_defconfig 2017-11-11 15:36:17.097433570 +0100 @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/sopine_baseboard_defconfig u-boot.new/configs/sopine_baseboard_defconfig --- u-boot.orig/configs/sopine_baseboard_defconfig 2017-11-11 14:28:05.713649666 +0100 +++ u-boot.new/configs/sopine_baseboard_defconfig 2017-11-11 15:36:17.097433570 +0100 @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_MACH_SUN50I=y +CONFIG_MACH_SUN50I_64=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y CONFIG_DRAM_CLK=552 @@ -20,3 +20,8 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +# U-boot + ATF is bigger than 504K => move environment from 544K (0x88000) to 672K (0xA8000) +CONFIG_ENV_OFFSET=0xA8000 +# Since 64bit SPL does not fit in 32K, is not very useful to add ATF support... +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/configs/sopine_baseboard_spl32_defconfig u-boot.new/configs/sopine_baseboard_spl32_defconfig --- u-boot.orig/configs/sopine_baseboard_spl32_defconfig 1970-01-01 01:00:00.000000000 +0100 +++ u-boot.new/configs/sopine_baseboard_spl32_defconfig 2017-11-11 15:36:17.098433179 +0100 @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_32=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC0_CD_PIN="" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x44000 diff -urwpN u-boot.orig/include/spl.h u-boot.new/include/spl.h --- u-boot.orig/include/spl.h 2017-11-11 14:28:07.728861762 +0100 +++ u-boot.new/include/spl.h 2017-11-11 15:36:17.121424194 +0100 @@ -23,6 +23,7 @@ struct spl_image_info { const char *name; u8 os; + u8 arch; ulong load_addr; ulong entry_point; u32 size;